NoC Impact on Design Methodology. Characteristics of NoC-based design. Timing Closure in Traditional VLSI

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1 NoC Impac on Desgn Mehodology Avnoam Kolodny NoC as Means o Handle Complexy (Oucome of Moore s Law) Prncples for dealng wh complexy: Absracon Herarchy egulary Desgn Mehodology Termnals per module (T) 0 en s rule: T = k N r en s exponen < Avnoam Kolodny NOC Desgn Tuoral NOCS Transsors per module (N) Avnoam Kolodny NOC Desgn Tuoral NOCS Characerscs of NoC-based desgn Each sysem module can sll be desgned n he radonal way The dfferences are a he full-chp sysem level: Sysem negraon nvolves nework synhess A sysem-level raffc model s requred uno us a connecvy nels placemen: performed n he conex of nework opology uno us geomercal placemen udrven by power and delay consderaons Transacons a he sysem level ake mulple clock cycles Sharng of nework resources nroduces unceranes usascal mehods for NoC desgn are evolvng Many ssues ranslae no nework resource allocaon problems Le s look a an example: sysem mng closure Avnoam Kolodny NOC Desgn Tuoral NOCS Tmng Closure n Tradonal VLSI Inerconnec-based mng analyss s n a feedback-loop Synhess mus predc he delays somehow Wreload models are used for pre-layou C esmaon The eraon loop mgh no converge feedback Logc Synhess Schemacs (nels) Sac Tmng analyss feedback Layou Synhess Layou C exrac Avnoam Kolodny NOC Desgn Tuoral NOCS

2 Tmng closure n NoC Placemen n a NoC Defne nermodule raffc Defne nermodule raffc Place modules Place modules Increase lnk capaces Allocae lnk capaces QoS Sasfed? In a NoC, mng convergence becomes a nework capacy allocaon problem Verfy QoS and cos Too low capacy resuls n poor QoS Too hgh capacy wases power/area Unform lnk capaces are a wase n applcaon-specfc sysems! Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS Ierave allocaon of lnk capacy Defne nermodule raffc Problem Essence How much capacy [bs/sec] should be assgned o each lnk? All daa flows mus mee her delay requremens Mnmze oal resources Place modules Smulaon for mng verfcaon akes oo long..and s daa-dependen Allocae lnk capaces Verfy QoS and cos A smple model o esmae delays hrough he nework s requred! Need Sac Tmng Analyss for he nework Need he delay for each of he daa flows Consder effecs of wormhole swchng Consder neracon among flows Consder vrual channels Do no assume all lnks are equal Too low capacy resuls n poor QoS Too hgh capacy wases power/area Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS

3 Wormhole Delay Analyss Packe Delvery Tme The delvery resembles a ppelne pass Packe ransmsson can be dvded no wo separaed phases: Pah acquson Fls ransmsson IP2 The delvery me of long packes s domnaed by he slowes lnk Transmsson rae Lnk sharng IP2 Low-capacy lnk We focus on he fls ransmsson phase IP IP Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS Packe Delvery Tme Analyss Bascs The delvery me of long packes s domnaed by he slowes lnk Transmsson rae Lnk sharng IP2 IP3 Deermne he flow s delay n each lnk Accoun for nerleavng IP Avnoam Kolodny NOC Desgn Tuoral NOCS 2009 Avnoam Kolodny NOC Desgn Tuoral NOCS

4 Sngle Hop Flow, No Sharng Sngle Hop Flow, wh Sharng = C l = C Λ l Bandwdh used by oher flows on lnk - mean me o delver a fl of flow over lnk [sec] C - capacy of lnk [bs per sec] l - fl lengh [bs/fl] C l Λ - mean me o delver a fl of flow over lnk - capacy of lnk [bs per second] - fl lengh [bs/fl] - oal fl necon rae of all flows sharng lnk, excep flow [fls/sec] Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS The Convoy Effec Emprcally consder ner-lnk dependences: Wormhole backpressure Traffc ams down he road Toal Packe Transmsson Tme Weakes lnk domnaes ransmsson me Accoun for all subsequen hops Λ l = + C ds (, k) k k k k π k Lnk Load Basc delay weghed by dsance Packe sze [fls/packe] T m max( π ) nework Accoun for weakes lnk Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS

5 Queung occurs a he source Queung delay: T Q = 2 ( λ ) 2 T nework Add Queung Delay nework So, We have a sac delay model Emprcal formula based on average necon raes Easy o evaluae (non-smulaon) Provdes a reasonable esmae for average delay hrough he nework Now, we can use he model for allocang suffcen bandwdhs o he lnks of he NoC * I. Waler, Z. Guz, I. Cdon,. Gnosar and A. Kolodny, Effcen Lnk Capacy and QoS Desgn for Wormhole Nework-on-Chp, DATE Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS Lnk Capacy Allocaon Problem Use he delay analyss o solve an opmzaon problem Gven: Sysem opology and roung Each flow s bandwdh (f ) and delay bound (T EQ ) Mnmze oal lnk capacy Ce e E Such ha: Capacy Allocaon Algorhm Greedy, erave algorhm For each src-ds par: uuse delay model o denfy he mos sensve lnk uincrease s capacy uepea unl delay requremens are me flow : T T EQ Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS

6 Capacy Allocaon Example# Unform raffc wh dencal requremens Unform allocaon: 74.4Gb/sec Capacy allocaon algorhm: 69Gb/sec Toal capacy reduced by 7% Capacy Allocaon Example#2 A SoC-lke sysem wh heerogeneous raffc demands and delay requremens Unform allocaon: 4.8Gb/sec Capacy allocaon Algorhm: 28.7Gb/sec Toal capacy reduced by 30% Before opmzaon Afer opmzaon Before opmzaon Afer opmzaon Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS Slack [%] Slack Elmnaon Packe Delay Slack Exenson I: Analycal (non-emprcal) delay models Goal: Analycal delay model nsead of an emprcal one Approaches: Use nework calculus o compue delay bounds usee a hs conference: Analyss of Wors-case Delay Bounds for Bes-effor Communcaon n Wormhole Neworks on Chp, by Y. Qan e al. Analycal Modelng and Evaluaon of On-Chp Inerconnecs Usng Nework Calculus, by M. Bakhouya e al. Flow Slacks canno be pushed o zero because lnks are shared Use queung heory o oban sascal average delay per flow usee a hs conference: Packe-Level Sac Tmng Analyss for NoCs, by E. Krmer e al. Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS

7 Queung heory approach: Transformaon no a fne Markov Chan Exenson II: Sascal Approach o NoC Desgn Gven: Traffc marx dsrbuon (consderng many dfferen use cases) Topology oung Lnk capaces Compue a sascal congeson guaranee 95% of raffc marces wll receve enough capacy * Packe-Level Sac Tmng Analyss for NoCs, by E. Krmer e al., Sesson 3 (poser ) Avnoam Kolodny NOC Desgn Tuoral NOCS * I. Cohen, O. oensrech, and I. Keslassy, Sascal Approach o NoC Desgn,", NoCS '08 Avnoam Kolodny NOC Desgn Tuoral NOCS Traffc Load Dsrbuon Plo (T-Plo) Cavea: The Capacy Allocaon Paradox Gaussan? A Node A Node B C A C B ouer C Node C PDF 99.99% of raffc marces brng load under.6 Wors-case raffc load = 2 20% gan B Unlmed queues Fne (small) buffers Capacy Allocaon Paradox: Addng Capacy Can Desablze he Nework (reasons: small buffers + arbraon polcy) 27 Lnk Load * A. Baron,. Gnosar and I. Keslassy, "The Capacy Allocaon Paradox," IEEE Infocom '09 Avnoam Kolodny NOC Desgn Tuoral NOCS Avnoam Kolodny NOC Desgn Tuoral NOCS

8 Capacly Allocaon Paradox: Inuon Assume A has prory: (a) C A = (b) C A =2 [pk/t] [pk/t] Share of C 2 Share of C 2 Node A C A =2 A = Node B C B = A A B B () ouer Mn. Sze Buffer C =2 Node C Avnoam Kolodny NOC Desgn Tuoral NOCS T A2 A2 B2 (a) 2T A3 B3 T/2 T 3T/2 2T 5T/2 (b) B (2) A3 3T B2 () 3T C B [Kf/s] C B [Kf/s] Sably Pcure 0 C = 273[Kf/s] EP (Consan) C A [Kf/s] C A [Kf/s] Avnoam Kolodny NOC Desgn Tuoral NOCS A = B = 00[Kf/s] Concluson NoC-based mehodology helps handlng of nerconnecon complexy n large sysems Absracon Herarchy egulary Modulary Shared resources (lnks, buffers) New problems are seemngly nroduced by he NoC: Nework desgn opons/ssues esource sharng adds unceranes and farness ssues. Bu mos of hese problems are hdden somewhere anyway NoC-based desgn mehodologes are evolvng Excng research opporunes! Avnoam Kolodny NOC Desgn Tuoral NOCS